From Humble Beginnings, Great Things Grow: New Embedded Passive Standards Nearly Complete

By David McGregor, E. I. du Pont de Nemours and Co.

Creating a new IPC document can be a challenging experience. It certainly has been for a dedicated group of people who have been working on IPC-4821, Specification for Embedded Passive Device Capacitor Materials for Rigid and Multilayer Printed Boards. The group had to deal with a “green” chairperson (this author), a wide variety of new materials for both embedded passive resistors and capacitors, uncertainty about how these materials would be tested to conform to Underwriters Laboratories Inc. (UL) requirements and that many TM-650 test methods would not be applicable. Additional needs also quickly became apparent.

In the beginning, there was a person (okay, his name is McGregor) who had great interest in developing new documents related to embedded passives but had never been a part of an IPC standards writing subcommittee. This greenhorn volunteered to chair a group to begin work on a materials standard for embedded passives. The chair believes his lack of experience probably set the effort back initially, but the group returned to the meeting energetic and quickly overcame the greenhorn’s lack of experience.

Initially, the wide variety of materials and processes posed difficulty in organizing a document. Embedded passive materials are made as laminates, pastes, plating solutions and sputtered materials. The early effort focused on writing one document for both capacitor and resistor materials, but it became unwieldy. Splitting capacitors and resistors into their own documents proved to be very beneficial. IPC-4821 is the document for capacitor materials and IPC-4811 is for resistor materials.

Encouraging UL to become involved was invaluable. Early on, it became apparent that many new organic-based materials would have to meet UL requirements, but they were not in a form that could be tested. For example, an 8 micron thick, barium titanate filled, epoxy laminate could not stand alone (copper etched from both sides) for a typical UL burn test. What to do? Denny Fritz, MacDermid, Inc., used his IPC and UL contacts to make UL aware of our effort. As a result, Crystal Vanderpan, a UL engineer, attended subcommittee meetings, learning about the different embedded passive materials and communicating back to her colleagues. She was instrumental in both defining requirements for the different types of materials and how they could be fabricated for testing.

Many materials turned out to be outside the sample requirements for IPC-TM-650 test methods. All IPC-TM-650 test methods define attributes of the sample that is to be tested. For example, existing methods for measuring dielectric strength are generally based on ASTM D149, are for relatively thick samples, and use a ramping voltage of 500 volts/second ramp rate. Embedded capacitor laminates thinner than 25 microns and also filled with ceramic fillers cannot be tested by these methods. Another example is measuring dielectric constant and loss tangent. Dr. Jan Obrzut of NIST surveyed the existing IPC-TM-650 methods. The group concluded that these methods were very good for the materials for which they were developed but not suitable for very thin (4 - 25 microns) organic dielectrics filled with high dielectric constant ceramic particles. As a result, a new method (method 2.5.5.10) was recently added to IPC-TM-650.

From humble beginnings, great things grow. While initial work began solely on a materials standard, the subcommittee realized more was necessary. Designing with embedded passives is not straightforward and a design guide was needed. Having embedded passives within the substrate of the board would impact board performance requirements. New test methods were needed.

Fortunately, volunteers emerged to take on these tasks. Richard Snogren, Bristlecone LLC, and Kim Fjeldsted, Arrowsmith Partners, co-chair the D-51, Embedded Passives Design Subcommittee. They and other volunteers are nearing completion of an embedded passives design guideline document. Chair Mike Luke, Raytheon Company and vice chair G. Sidney Cox, E. I. du Pont de Nemours and Co., are leading D-53, Embedded Devices Performance Subcommittee and looking at the impact of embedded passives on board performance requirements. Obrzut and Robert Croswell, Motorola Inc., co-chair D-54, Embedded Devices Test Methods Subcommittee.

Confronting the challenges in creating new documents for embedded passives has been very rewarding. IPC-4821 (embedded capacitors) is in final ballot and is expected to be released shortly. IPC-4811 (resistors) is nearly ready to become a final draft. A design guide is also in its final stages. Work is progressing on a board performance document. One new test method has been added to IPC-TM-650 and additional methods are being developed. When dedicated volunteers work together, effective documents are created to aid the printed circuit board industry.

David McGregor is a senior development associate at E. I. du Pont de Nemours and Co. and chairman of the D-50, Embedded Components Committee.